The disclosed embodiments of the present invention relate to signal reception, and more particularly, to an imbalance compensator for correcting mismatch between an in-phase branch and a quadrature branch, and related imbalance compensation method and direct conversion receiving apparatus thereof.
A direct conversion receiving (DCR) structure, also known as zero-IF receiver, is a receiver design that demodulates the incoming radio frequency signal by using a local oscillator (LO) signal whose frequency is identical to or very close to the carrier frequency of a wanted signal. In general, the DCR structure has some advantages such as high chip integration, low cost, low power consumption, small form factor, etc. However, the DCR structure may also have some disadvantages such as DC offset, flicker noise, etc. More specifically, when a quadrature down-conversion scheme is employed for feeding the signal to an in-phase (I) branch and a quadrature (Q) branch and then down-converting the I signal and Q signal by LO signals requiring a 90-degree phase difference therebetween, the practical DCR structure may generate a corrupted baseband signal output due to I/Q mismatch, including gain mismatch, phase mismatch, and filter mismatch effects. Hence, an imbalance compensation scheme is required for correcting the undesired mismatch.
One conventional offline imbalance compensation scheme employs a two-stage correction which performs a filter/gain mismatch compensation, and an oscillator phase mismatch compensation, sequentially. Only after the filter/gain mismatch correction is accomplished, the oscillator mismatch correction is allowed to be started. Thus, the two-stage correction is time-consuming task. Moreover, due to the inherent characteristics of the two-stage correction using a compensator implemented in the digital domain, additional switch devices are also introduced to the DCR structure for properly controlling the execution sequence of the filter/gain mismatch correction and the oscillator mismatch correction. For example, a first switch device is disposed between the in-phase branch mixer and the in-phase branch low-pass filter, a second switch device is disposed between the quadrature branch mixer and the quadrature branch low-pass filter, a third switch device is employed to control if a calibration/test signal generated from a calibration source is fed into the in-phase branch mixer and quadrature branch mixer, and a fourth switch device is employed to control if the calibration/test signal generated from the calibration source is fed into the in-phase branch low-pass filter and quadrature branch low-pass filter. During the filter/gain mismatch correction procedure, the first switch device, second switch device, and third switch device are all switched off, whereas the fourth switch device is switched on. During the oscillator mismatch correction procedure, the first switch device, second switch device, and third switch device are all switched on, whereas the fourth switch device is switched off. Unfortunately, these switch devices may introduce correction precision uncertainty since the switch devices might also have mismatch concern, which in turn requires a more complicated adaptive filter section implemented in the conventional digital-domain compensator.
Thus, there is a need for an innovative imbalance compensation scheme which is capable of correcting the mismatch effect efficiently and precisely.